• seb-harmonik.ar

    @toxonic whatever it is, it's from [t_comp~]. I get an "illegal instruction" crash. in t_comp::compute

    Maybe it has something to do with 64-bit vs 32-bit too?

    Recompiling [t_comp~] will probably fix it
    edit: I tried recompiling myself but that didn't work either, seems like a bug in the faust compiler

    posted in patch~ read more
  • seb-harmonik.ar

    @jaffasplaffa yeah that's one of the issues, a result of the shape of the bandlimited pulse changing from jumping around frequencies (so the negative and positive parts don't exactly cancel out in the sum, and so then they build up in the integrator.)

    posted in technical issues read more
  • seb-harmonik.ar

    @jaffasplaffa they don't use upsampling but they do use blit (leaky integration of a periodic sinc function/bandlimited impulse train) and so they can't use hard sync or too much frequency modulation unfortunately.
    bc blit sounds better when you don't need those things imo. (I haven't checked out jpcex yet though, seems like it uses minblep too which might sound ok with long tables)

    posted in technical issues read more
  • seb-harmonik.ar

    @nuromantix I think that generally the way hard sync is done is by putting windowed sincs into a delay line. you can also make the impulses/steps more minimum-phase in order to avoid the delay. (that's what the bandlimited oscillators in the creb library use)
    check out this paper http://www.cs.cmu.edu/~eli/papers/icmc01-hardsync.ps

    posted in technical issues read more
  • seb-harmonik.ar

    @whale-av hmm well I'm not sure what pd you're using or what your environment is like, but pd vanilla shouldn't call those procs at all because when it draws cables it simply sends "line" messages directly to tcl.

    posted in technical issues read more
  • seb-harmonik.ar

    @whale-av to continue the OT posting.. the hooks won't work without the changes in this pr https://github.com/pure-data/pure-data/pull/1049
    btw the one you uploaded was the bezier curve version, not the segmented version

    posted in technical issues read more
  • seb-harmonik.ar

    @ddw_music here's a version I recently made for an organelle project
    float-speedlim.zip
    Screen Shot 2021-10-01 at 12.00.31 AM.png
    edit: I noticed that cyclone's [speedlim] works for any message (not just floats like iemlib's [speedlim]) so here's a modified version to do that:
    any-speedlim.zip
    Screen Shot 2021-10-01 at 1.54.05 AM.png
    (if a message comes in while a delay/"pending" state is happening, set a flag and store what was received in the [list], and the flag in a [f ]. After the delay/"pending" state, if the flag is set then output the contents of the [list], and restart the delay/"pending" state.
    If in the "idle" state the incoming message passes directly through the lower [spigot] and starts a delay/"pending" state. The lower spigot is blocked during the "pending" state, but opens between "pending" states if a message was received during the prior one, before starting a new "pending" state.)

    posted in technical issues read more
  • seb-harmonik.ar

    @ddw_music you can also spoof relationals by using a [tabread~] with an array that only has a 0 and a 1

    posted in technical issues read more
  • seb-harmonik.ar

    also if the list size is < 100 the elements are allocated on the stack rather than the heap (which is faster). There's no limit on the length except for available RAM though.

    posted in technical issues read more
  • seb-harmonik.ar

    @Cmaj7 I can't hear anything when replicating the patch by its visual representation.. what range is the slider? 0-1? what size is the array?

    posted in technical issues read more

Internal error.

Oops! Looks like something went wrong!