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I want to design a circuit that blocks input until the input signal equals the last output value. when the values are equal to the input data values, updating the output value begins. when the input signal is not equal to the last output value, the circuit is blocked again.
This work on the axoloti core does not work in the PD. how would I be able to do this?
pure data (https://i.stack.imgur.com/svk0m.png)
axoloti core (https://i.stack.imgur.com/9nUgc.png)